Shop Floor Cognitive Accelerator hardware is a reconfigurable hardware platform built around a programmable System on Chip (SoC) that combines an embedded multi-core processor and an FPGA fabric to exploit both software- and hardware-based processing in an edge computing context. By moving computation close to data sources, the platform provides reduced latency (communications with the cloud infrastructure can be optimized) and increased privacy.
The Shop Floor Cognitive Accelerator Hardware allows developers to deploy their algorithms as dedicated application-specific accelerators on the FPGA fabric. Two complementary technologies ease the hardware-related development by abstracting the low-level technology dependencies, which are usually a wall for software-oriented developers: Dynamic and Partial Reconfiguration (DPR), which enables flexible hardware implementations in which the internal FPGA resources are multiplexed in time, and High-Level Synthesis (HLS), which enables hardware accelerator specification in high-level programming languages such as C or C++.
In addition, the Shop Floor Cognitive Accelerator Hardware features standard interfaces to establish communication channels with both the machines and/or sensors available on the Shop Floor and the cloud infrastructure, enabling an edge-to-cloud continuum.
Finally, the Shop Floor Cognitive Accelerator Hardware will include internal mechanisms to enable automated run-time self-monitoring and self-management. These mechanisms will be based on a dedicated on-board measurement infrastructure and embeddable Machine Learning (ML) models to estimate both performance and power consumption, and to make online decisions to move the platform to the optimal operating point.